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M62366GP
3 V Type 8-bit 12ch D/A Converter with Buffer Amplifiers
REJ03D0876-0300 Rev.3.00 Mar 25, 2008
Description
The M62366GP is a CMOS semiconductor IC, containing 12 channels of 8-bit D/A converters, with a highperformance buffer operational amplifier provided in the output of each channel. It is operable with a low supply voltage between 2.7 to 3.6 V, and is easy to use due to serial data input, and 3-pin (DI, CLK, LD) connection with microcomputer. The IC also contains DO pin terminal, enabling cascade connection. The built-in buffer operational amplifiers are of full-swing design with a wide operating supply voltage range for input/output voltage. In addition, this IC provides improved stability against a capacitive load, and therefore is suitable for application to electronic volume (VCA) control, substitute for adjustment semi-fixed resistor, etc.
Features
* * * * * Operable with a low voltage between 2.7 to 3.6 V 12-bit serial data input (connected via 3 pins: DI, CLK, LD) 12 channels of R-2R and segment type high-performance 8-bit D/A converters 12 buffer operational amplifiers with full swing of output voltage between VCC and GND High oscillation stability against the capacitive load of buffer operational amplifiers
Application
Adjustment/control of industrial or home-use electric equipment, such as VTR camera, VTR set, TV, and CRT display.
Block Diagram
GND 20 AO2 19 AO1 18 DI 17 CLK 16 LD 15 Do 14 AO12 13 AO11 12 VCC 11
8-bit R-2R +segment D/A converter
Ch2 latch
8-bit
-
...
+
-
D/A
1
L
+
-
+
-
+
12-bit shift register
D0 1 2 3 4 5 6 D7 D8 9 10 D11
D/A
12
D/A
11
(8) (12)
Address decoder
L
L
(12)
(12)
8-bit
........
latch Ch3
8-bit R-2R +segment D/A converter
L
4 5
L
6
L
7
L
8
L
9
L
10
L D/A
- +
D/A
- +
D/A
- +
D/A
- +
D/A
- +
D/A
- +
D/A
- +
-
+
Buffer operational amplifier
1 VSS (VrefL)
2 VO3
3 VO4
4 VO5
5 VO6
6 VO7
7 VO8
8 VO9
9 VO10
10 VDD (VrefU)
REJ03D0876-0300 Rev.3.00 Mar 25, 2008 Page 1 of 7
M62366GP
Pin Arrangement
M62366GP
VSS (VrefL) AO3 AO4 AO5 AO6 AO7 AO8 AO9
1 2 3 4 5 6 7 8 20 GND 19 AO2 18 AO1 17 DI 16 CLK 15 LD 14 Do 13 AO12 12 AO11 11 VCC
AO10 9 VDD 10 (VrefU)
(Top view) Outline: 20P2E-A
Pin Description
Pin No. 17 14 16 15 18 19 2 3 4 5 6 7 8 9 12 13 11 20 10 1 Pin Name DI DO CLK LD AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 AO11 AO12 VCC GND VDD VSS Function Serial data input terminal to input 12-bit long serial data Terminal to output MSB data of 12-bit shift register Shift clock input terminal. Input signal at DI pin is input to 12-bit shift register at rise of shift clock pulse When H-level signal is input to this terminal, the value stored in 12-bit shift register is loaded in decoder and D/A converter output register. 8-bit D/A converter output terminal
Power supply terminal GND terminal D/A converter upper reference voltage input terminal D/A converter lower reference voltage input terminal
REJ03D0876-0300 Rev.3.00 Mar 25, 2008 Page 2 of 7
M62366GP
Block Diagram for Explanation of Terminals
VCC
11
GND
20
DI 17 CLK 16
D0 D1 D2 D3
12-bit shift register
D4 D5 D6 D7 D8 D9 D10 D11
14 Do
8 12
Address decoder
1234
15 LD
12
.........
1
D0
..... 8-bit latch
D7
D0
............................... 12 ...............................
..... 8-bit latch
D7
8-bit R-2R+segment D/A converter
8-bit R-2R+segment D/A converter
+ -
+ -
..........................................................................
10
18
13
1
AO1 VDD (VrefU)
AO12
VSS (VrefL)
Absolute Maximum Ratings
Item Supply voltage Upper reference voltage of D/A converter Input voltage Output voltage Power dissipation Operating temperature Storage temperature Symbol VCC VDD VIN VO Pd Topr Tstg Ratings -0.3 to +7.0 -0.3 to +7.0 -0.3 to VCC + 0.3 -0.3 to VCC + 0.3 150 -20 to +85 -40* +125 Unit V V V V mW C C
REJ03D0876-0300 Rev.3.00 Mar 25, 2008 Page 3 of 7
M62366GP
Electrical Characteristics
(VCC, VrefU = +3 V 10%, VCC VrefU, GND, VrefL = 0 V, Ta = -20 to +85C, unless otherwise noted.)
Item Supply voltage Circuit current Input leak current Input low voltage Input high voltage Output low voltage Output high voltage Note: Symbol VCC ICC IILK VIL VIH VOL VOH Min 2.7 -- -10 -- 0.8 VCC -- VCC - 0.4 Limits Typ 3.0 1.5 -- -- -- -- -- Max 3.6 3.5 10 0.2 VCC -- 0.4 -- Unit V mA A V V V V Conditions CLK = 1 MHz operation, VCC = 3 V, IAO = 0 A VIN = 0 to VCC
IOL = 2.5 mA IOH = -400 A
The standard values are obtained at Ta = 25C
(VCC, VrefU = +3 V 10%, VCC VrefU, Ta = -20 to +85C, unless otherwise noted.)
Item Current dissipation D/A converter upper reference voltage range D/A converter lower reference voltage range Buffer amplifier output driver voltage range Buffer amplifier output voltage range Differential nonlinearity error Nonlinearity error Zero code error Full scale error Output capacitive load Buffer amplifier output impedance Symbol IrefU VrefU VrefL VAO Min -- 0.7 VCC GND 0.1 0.2 -0.3 -1.0 -1.5 -2 -2 -- -- Limits Typ 1.4 -- -- -- -- -- -- -- -- -- -- 5 Max 2.5 VCC 0.3 VCC VCC - 0.1 VCC - 0.2 1 1.0 1.5 2 2 0.1 -- Unit mA V V V V mA LSB LSB LSB LSB F Conditions VrefU = 3 V, VrefL = 0 V Data condition: at maximum current Reference voltage cannot always be set to any value in this range, because it is restricted to the buffer amplifier output voltage range. IAO = 100 A IAO = +500 A -200 A Upper saturation voltage = 0.4 V Lower saturation voltage = 0.4 V VCC = 2.760 V VrefU = 2.610 V VrefL = 0.050 V (10 mV/LSB) Without load (IAO = 0)
IAO SDL SL SZERO SFULL CO RO
REJ03D0876-0300 Rev.3.00 Mar 25, 2008 Page 4 of 7
M62366GP
AC Characteristics
(VCC, VrefU = +3 V 10%, VCC VrefU, GND, VrefL = 0 V, Ta = -20 to +85C, unless otherwise noted.)
Item Clock "L" pulse width Clock "H" pulse width Clock rise time Clock fall time Data setup time Data hold time LD setup time LD hold time LD "H" pulse duration time Data output delay time D/A output setting time Symbol tCKL tCKH tCR tCF tDCH tCHD tCHL tLDC tLDH tDO tLDD Min 200 200 -- -- 30 60 200 100 100 70 -- Limits Typ -- -- -- -- -- -- -- -- -- -- -- Max -- -- 200 200 -- -- -- -- -- 350 300 Unit ns ns ns ns ns ns ns ns ns ns s Conditions
CL = 100 pF CL 100 pF, VAO: 0.1 2.6 V This time until the output becomes the final value of 1/2 LSB
Timing Chart
tCR tCKH tCF
CLK
tCKL
DI
tLDH tDCH tCHD tCHL
tLDC
LD
tLDD
D/A output
tDO
DO output
REJ03D0876-0300 Rev.3.00 Mar 25, 2008 Page 5 of 7
M62366GP
Digital Data Format
Last LSB D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 First MSB D11
DAC data
DAC select data
DAC Data
D0 0 1 0 1 : 0 1 Note: D1 0 0 1 1 : 1 1 D2 0 0 0 0 : 1 1 D3 0 0 0 0 : 1 1 D4 0 0 0 0 : 1 1 D5 0 0 0 0 : 1 1 D6 0 0 0 0 : 1 1 D7 0 0 0 0 : 1 1 D/A Output (VrefU - VrefL) / 256 x 1 + VrefL (VrefU - VrefL) / 256 x 2 + VrefL (VrefU - VrefL) / 256 x 3 + VrefL (VrefU - VrefL) / 256 x 4 + VrefL : (VrefU - VrefL) / 256 x 255 + VrefL VrefU
VrefU = VDD, VrefL = VSS
DAC Select Data
D8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D10 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DAC Selection Don't care AO1 selection AO2 selection AO3 selection AO4 selection AO5 selection AO6 selection AO7 selection AO8 selection AO9 selection AO10 selection AO11 selection AO12 selection Don't care Don't care Don't care
Timing Chart (Model)
MSB DI D11 D10 D9 D8
.............
LSB D2 D1 D0
CLK
..................
LD
D/A output
REJ03D0876-0300 Rev.3.00 Mar 25, 2008 Page 6 of 7
M62366GP
Package Dimensions
20P2E-A
EIAJ Package Code SSOP20-P-225-0.65 JEDEC Code -- Weight(g) 0.08 Lead Material Alloy 42
Plastic 20pin 225mil SSOP
e b2
20
11
HE
E
F Recommended Mount Pad Symbol
1 10
e1
A
G
D
b
e
x
M
A2
A1
y
c z Z1 Detail G Detail F
A A1 A2 b c D E e HE L L1 z Z1 x y b2 e1 I2
Dimension in Millimeters Min Nom Max 1.45 -- -- 0.2 0 0.1 -- -- 1.15 0.32 0.17 0.22 0.2 0.13 0.15 6.6 6.4 6.5 4.5 4.4 4.3 0.65 -- -- 6.6 6.4 6.2 0.7 0.5 0.3 1.0 -- -- 0.325 -- -- 0.475 -- -- 0.13 -- -- 0.1 -- -- -- 0 10 -- -- 0.35 5.8 -- -- 1.0 -- --
L1
REJ03D0876-0300 Rev.3.00 Mar 25, 2008 Page 7 of 7
L
I2
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